Generally, liquid crystal displays (LCD) control light transmittance of a liquid crystal using an electric field, to thereby display a picture. Liquid crystal displays may be classified into a vertical electric field type and a horizontal electric field type depending upon a direction of the electric field applied to the liquid crystal.
The liquid crystal display of vertical electric field applying type drives a liquid crystal in a twisted nematic (TN) mode with a vertical electric field formed between a pixel electrode and a common electrode arranged in opposition to each other on an upper and a lower substrate. The liquid crystal display of vertical electric field applying type has an advantage of a large aperture ratio while having a drawback of a narrow viewing angle of about 90°.
The liquid crystal display of horizontal electric field applying type drives a liquid crystal in an in plane switch (IPS) mode with a horizontal electric field between the pixel electrode and the common electrode arranged parallel to each other on the lower substrate. The liquid crystal display of horizontal electric field applying type has an advantage of a wide viewing angle of about 160°.
The liquid crystal display of the horizontal electric field applying type includes a thin film transistor array substrate (i.e., a lower substrate) and a color filter array substrate (i.e., an upper substrate) joined in opposition to each other, a spacer for uniformly maintaining a cell gap between two substrates, and a liquid crystal filled into a space defined by the spacer.
The thin film transistor array substrate is comprised of a plurality of signal lines and thin film transistors for forming a horizontal electric field for each pixel, and an alignment film coated thereon to align the liquid crystal. The color filter array substrate includes a color filter for implementing a color display, a black matrix for preventing a light leakage and an alignment film coated thereon to align the liquid crystal.
FIG. 1 is a plan view showing a structure of a thin film transistor array substrate in a related art liquid crystal display panel of horizontal electric field applying type, and FIG. 2 is a section view of the thin film transistor array substrate taken along the I-I′ line in FIG. 1.
The thin film transistor array substrate includes a gate line 2 and a data line 4 provided on a lower substrate 45 in such a manner to intersect each other, a thin film transistor 6 provided at each intersection, a pixel electrode 14 and a common electrode 18 provided at a pixel area 5 defined by the intersection structure for the purpose of forming a horizontal field, and a common line 16 commonly connected to the common electrode 18.
The gate line 2 supplies a gate signal to a gate electrode 8 of the thin film transistor 6. The data line 4 supplies a pixel signal, via a drain electrode 12 of the thin film transistor 6, to the pixel electrode 14. The gate line 2 and the data line 4 are provided at an intersection structure to define the pixel area 5.
The gate line 2 is connected, via a gate pad portion (not shown), to a gate driver (not shown).
The data line 4 is connected, via a data pad portion (not shown), to a data driver (not shown).
The common line 16 is disposed parallel to the gate line 2 with having the pixel area 5 therebetween to apply a reference voltage for driving the liquid crystal to the common electrode 18.
The thin film transistor 6 allows the pixel signal of the data line 4 to be charged and maintained in the pixel electrode 14 in response to the gate signal of the gate line 2. To this end, the thin film transistor 6 includes a gate electrode 8 connected to the gate line 2, a source electrode 10 connected to the data line 4, and a drain electrode 12 connected to the pixel electrode 14. Further, the thin film transistor 6 includes a semiconductor pattern 49 having an active layer 48 overlapping with the gate electrode 8 with having a gate insulating film 46 therebetween to define a channel between the source electrode 10 and the drain electrode 12. The semiconductor pattern 49 is further provided with an ohmic contact layer positioned on the active layer 48 to make an ohmic contact with the data line 4, the source electrode 10 and the drain electrode 12.
The pixel electrode 14 is connected, via a third contact hole 17, to the drain electrode 12 of the thin film transistor 6 and is provided at the pixel area 5. Particularly, the pixel electrode 14 includes a first horizontal part 14a connected to the drain electrode 12 and disposed parallel with the adjacent gate line 2, a second horizontal part 14b overlapping with the common line 16, and a finger part 14c disposed parallel to the common electrode 18 between the first and second horizontal parts 14a and 14b. 
The common electrode 18 is connected to the common line 16 and is formed from the same metal as the gate line 2 and the gate electrode 8 at the pixel area 5. The common electrode 18 is disposed parallel to the finger part 14c of the pixel electrode 14 at the pixel area 5.
Accordingly, a horizontal electric field is formed between the pixel electrode 14, to which a pixel signal is supplied via the thin film transistor 6, and the common electrode 18, to which a reference voltage is supplied via the common line 16. The horizontal electric field is formed between the finger part 14c of the pixel electrode 14 and the common electrode 18. Liquid crystal molecules arranged in the horizontal direction between the thin film transistor array substrate and the color filter array substrate are rotated by such a horizontal electric field due to a dielectric anisotropy. Transmittance of a light transmitting the pixel area 5 is related to a rotation extent of the liquid crystal molecules, thereby implementing a gray level scale.
In the thin film transistor array substrate, a liquid crystal portion 51 positioned on the pixel electrode 14 having a low conductivity is not driven, as shown in FIG. 3. Thus, the aperture ratio is reduced by an area corresponding to the non-driven liquid crystal portion 51. Furthermore, since a light is transmitted into the pixel electrode 14, when a black grey level state is implemented, the total contrast ratio is reduced.